Hello World
While studying URLLC industrial use cases (e.g., 2 ms control loop robotics), I wanted to clarify something regarding 5G architecture.
As we know, AMF and SMF are part of the control plane and are involved during:
However, during real-time data transmission, the user plane path becomes:
UE → gNB → UPF → Edge Application (Controller)
So my question is:
In practical deployments targeting sub-5 ms latency, where is the dominant bottleneck typically observed?
RAN scheduling delay (numerology, mini-slot configuration)
Transport delay between gNB and UPF
UPF processing delay
Application processing at MEC
Would appreciate insights from those who have worked on live URLLC or MEC deployments.
Ahmed_ali2:
Hello World
While studying URLLC industrial use cases (e.g., 2 ms control loop robotics), I wanted to clarify something regarding 5G architecture.
As we know, AMF and SMF are part of the control plane and are involved during:
Registration
Authentication
PDU Session establishment
Slice selection
However, during real-time data transmission, the user plane path becomes:
UE → gNB → UPF → Edge Application (Controller)
So my question is:
In practical deployments targeting sub-5 ms latency, where is the dominant bottleneck typically observed?
RAN scheduling delay (numerology, mini-slot configuration)
Transport delay between gNB and UPF
UPF processing delay
Application processing at MEC
RAN scheduling (numerology, mini-slot config) often dominates because ultra-low latency requires very fast, deterministic scheduling at the gNB. Transport delay between gNB and UPF is small if the network is well-optimized and fiber/backhaul is short. UPF processing is minimal with modern hardware. Application processing at MEC can contribute, but MEC placement near the RAN usually keeps this under control.